DIY FPGA Dev Board

Reusing telecom board from trash bin as FPGA Dev Board.

Frederico Souza Sant'ana

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Description

Some day one of my coworkers was throwing away one fault telecom board. That board have one Xilinx FPGA, but it suffered fisical damages, two capacitors was destroyed.
The aim of this project is to reuse that FPGA and learn VHDL/Verilog.

Details

The board contains a Xilinx Spartan 6 FPGA (XC6SLX9TQG144), TI Sitara AM1705, SRAM, Ethernet PHY with 2 MagJacks and one ADSP from Analog Devices.

In one of my atempts to power up the board I destroyed the ADSP, RAM and the PHY :disappointed:.
But the good news was that the FPGA (and probably the Sitara, I haven't tested yet) was still working.

After some time triyng to find the JTAG traces in the board and using one FT2232 breakout board with OpenOCD was possible to execute JTAG commands and send the bitstream created with the Xilinx ISE to the FPGA.

In this board, the FPGA was responsible for the communication between some other carrier board, a great amount of GPIOs are exposed on the edge connector. Using these GPIOs I've build a 4 digit 7 segment display board with 4 buttons.

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Flash memory and some other changes
Frederico Souza Sant'ana • 08/29/2018 at 23:18 • 0 comments

The board didn't had a flash memory to store the FPGA configuration. The TI processor had to be removed to free the pins that are used to attach a flash memory to the FPGA. A Winbond 25Q16 was installed to store the bitstream. To upload the bitstream to flash I've used the fpgaprog command line tool and the FT2232.
A piece of veroboard was glued near the edge connector to facilitate the access to the FPGA pins.